Job Description

Overview

Possible 3 Month CTH | No Fees | Do Not Re-Post| Confidential

TMR ID: # FHT8PJ

Role: PCB Layout Engineer

Work location: Bay Area, California

Background and Meet and Greet: MANDATORY

Responsibilities

Symbol creation, Complete Placement and Layout of HDI Circuit Board Designs and FPCs with Cadence Allegro PCB Editor.
Generate all Fab and Assembly Packages (ODB++ or IPC-2581).
Interface with EE and ME staff for design development and solving board level related issues.
Work in a collaborative environment with multiple designers on a single design.

Qualifications

Proficient in Cadence Allegro PCB Editor and Constraint Management
Experience with Analog design layout techniques
Experience with RF design layout techniques (plus)
Experience with Switch Mode Power Supply layout techniques
Experience with Impedance Control and Transmission Line Theory
Experience with Downstream BluePrint and CAM350 (plus)
Excellent organization and communications skills
Ability to work well with a diverse group of dedicated professionals
Required Experience: 10+ Years Industry Experience performing PCB Design using Cadence Allegro PCB Editor.
The Ideal candidate will be capable of designing 20+ layer board designs.

Submission Details

First Name, Middle name, and Last Name
City and State
Open to Relocate?
Rate
Availability
Phone #
Mobile #
Email address
Visa type
Visa Expiration Date
Hiring Status

Brandon Vela - ERM
*** North America
Tel.: +***

#J-18808-Ljbffr

Job Tags

Full time, Relocation,

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